8085 microprocessor short notes
Just breeze through the notes and revise all concepts
8085 is 8-bit microprocessor [8 data lines ; 16 address lines]. Registers Six General Purpose Registers : B, C, D, E, H, L Special Purpose Registers : Accumulator, SP , PC , SR, IR, Temporery register(W,Z). Accumulator : acts as one source of operand during ALU operation & destination for most of ALU results. SP (Stack Pointer) : Contains address of top-of-stack. PC (Program Counter) : Contains address of next instruction to be fetched. SR (Status Register) : Used to store status of ALU results in flags (S,Z,Ac,P,C). IR (Instruction Register): ContainsOp-code of present instruction to be executed.
Interrupt Software Interrupt : RST 0 to RST 7 Its specified address(location) counted by : RST 0 => (0x8)H = 0000H ; RST 2 => (2x8)H = 0010H ;……
NOTE : Highest Priority PIN : HOLD — To provide DMA operation, DMA controller will request buses from µP by sending ‘HOLD’ signal to release buses. This HOLD signal is accepted immidiated after completing current machine cycle execution.
Highest Priority Interrupt : TRAP (RST 4.5) — TRAP mostly used for emergency conditions like power failure or overheating . TRAP is accepted immidiated after completing current instruction execution. — TRAP is edge triggered as well as level triggered. RST 7.5 is edge triggered and remaining all hardware int. Are level triggered.
8085 has 246 instructions. Each instruction is represented by an 8-bit binary value.These 8-bits of binary value is called Op-Code or Instruction Byte. Classifications : Data Transfer Instruction ,Arithmetic Instructions , Logical Instructions , Branching Instructions , Control Instructions
r1,r2,r=> any of 8 bit register (A,B,C,D,E,H,L)
rp =>any of 16 bit register paid (BC,DE,HL)
M =>memory location pointed by content of HL register
d8 =>immidiate data of 8 bit
‘x’ post fix =>register pair operation and it is always 1 byte instruction and No flags affected during such operations
PSW => Program status word(16 bit) = Accumulator + SR.
SIM : Set Interrupt Mask This is a multipurpose instruction and used to Reset RST 7.5 interrupt,Mask the interrupts 7.5, 6.5, 5.5, and serial data output. The instruction interprets the Accumulator contents as follows :
Example : Write instruction to mask RST 5.5 , RST 6.5 , send data to SOD pin.
- MVI A, CBh
RIM : Read Interrupt Mask This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the Accumulator with the following interpretations.